1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device, more specifically to a semiconductor memory device configured as an arrangement of memory cells that are provided with a variable resistor and are operative to store data by changing the resistance of the variable resistor. In addition, the invention relates to a method of manufacturing the nonvolatile memory device, and a method of screening the same.
2. Description of the Related Art
In recent years, along with a rising level of integration in semiconductor devices, circuit patterns of transistors and the like which configure the semiconductor devices are being increasingly miniaturized. Required in this miniaturization of the patterns is not simply a thinning of line width but also an improvement in dimensional accuracy and positional accuracy of the patterns. This trend applies also to semiconductor memory devices.
Conventionally known and marketed semiconductor memory devices such as DRAM, SRAM, and flash memory each use a MOSFET as a memory cell. Consequently, there is required, accompanying the miniaturization of patterns, an improvement in dimensional accuracy at a rate exceeding a rate of the miniaturization. As a result, a large burden is placed also on the lithography technology for forming these patterns which is a factor contributing to a rise in product cost.
In recent years, resistance varying memory is attracting attention as a candidate to succeed these kinds of semiconductor memory devices utilizing a MOSFET as a memory cell (refer, for example, to Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2005-522045). The resistive memory devices herein include resistive RAM (ReRAM), in a narrow sense, that uses a transition metal oxide as a recording layer and stores its resistance states in a non-volatile manner, as well as Phase Change RAM (PCRAM) that uses chalcogenide or the like as a recording layer to utilize the resistance information of crystalline states (conductors) and amorphous states (insulators).
Such a resistance varying memory has advantages that it is possible to adopt a cross-point cell structure in which memory cells are formed at an intersection point of crisscrossing bit lines and word lines, whereby miniaturization is facilitated in comparison to conventional memory cells, and, further, that it is possible to implement a stacking structure in a longitudinal direction, thereby facilitating an improved level of integration in the memory cells.
Two kinds of configurations for a variable resistor in the resistance varying memory are known. In one kind, known as a bipolar type, a high-resistance state and a low-resistance state are set by switching a polarity of an applied voltage. In the other kind, known as a unipolar type, setting of the high-resistance state and the low-resistance state are made possible by controlling a voltage value and a voltage application time, without switching the polarity of the applied voltage.
Write of data to a memory cell is implemented by applying for a short time to the variable resistor a certain voltage. As a result, the variable resistor changes from the high-resistance state to the low-resistance state. Hereinafter, this operation to change the variable resistor from the high-resistance state to the low-resistance state is called a setting operation.
In contrast, erase of data in the memory cell MC is implemented by applying for a long time to the variable resistor in the low-resistance state subsequent to the setting operation a certain voltage lower than that applied during the setting operation. As a result, the variable resistor changes from the low-resistance state to the high-resistance state. Hereinafter, this operation to change the variable resistor from a low-resistance state to a high-resistance state is called a resetting operation. The memory cell, for example, has the high-resistance state as a stable state (a reset state), and, in the case of binary data storage, data write is implemented by the setting operation which changes the reset state to the low-resistance state.
As miniaturization of the memory cells proceeds in such a resistance varying memory, there is an increased probability of a defect occurring, such as a short circuit in the variable resistor and the diode constituting the memory cell. There are various reasons for this. One reason is that a side wall of the variable resistor and the diode receive damage from etching, whereby a leak current becomes large. In the case of defective memory cells arising in this way, read and write likewise cannot be performed on memory cells connected to an identical bit line or word line as the defective memory cell, whereby yield ratio of the memory is worsened.